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layout ready for review

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zegonix
2024-03-21 18:45:53 +01:00
parent d10f81c2ae
commit 82bface3ff
18 changed files with 52086 additions and 21240 deletions
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pcb/pcb-qua-ken/pcb-quaken.kicad_pro
+14 -10
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@@ -111,18 +111,18 @@
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_clearance": 0.09999999999999999,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_clearance": 0.19999999999999998,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_resolved_spokes": 1,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_through_hole_diameter": 0.19999999999999998,
"min_track_width": 0.0,
"min_via_annular_width": 0.09999999999999999,
"min_via_diameter": 0.5,
@@ -182,8 +182,12 @@
"drill": 0.0
},
{
"diameter": 0.0,
"drill": 0.0
"diameter": 0.6,
"drill": 0.3
},
{
"diameter": 0.8,
"drill": 0.4
}
],
"zones_allow_external_fillets": false
@@ -428,9 +432,9 @@
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"track_width": 0.2,
"via_diameter": 0.55,
"via_drill": 0.2,
"wire_width": 6
},
{
@@ -445,7 +449,7 @@
"name": "Power",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"track_width": 0.3,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6